Title: Development of Parallel Architectures for Radar Signal Processing
Date: 9th July 2014 (Wednesday), 2.30 pm – 4.30 pm
Venue: Centre for Intelligent Signal & Imaging Research (CISIR), Electrical & Electronic Engineering Department, Universiti Teknologi Petronas, 31750 Tronoh, Perak
Modern parallel processing system can be designed using Multi-Core processors, Graphic Processing Units (GPUs), Multi-Core DSPs and Field Programmable Arrays (FPGAs). It is not known which kind of processing platform will be appropriate for a particular application. Considerable amount of simulation work is required to determine an appropriate architecture for a given application. Moreover development of parallel architectures requires an interdisciplinary approach of studying, identifying, and selecting good algorithms which are accurate and do not require massive amount of computing power. Execution of these algorithms on Multi-Core/GPUs/FPGAs architectures would require exploitation of parallel processing. This talk will present examples of radar signal processing applications on available various parallel processing platforms.
- A software tool is developed that is capable of auto-generating a fully optimized VHDL. It is a rapid prototyping environment and allows the designer to focus on the overall SoC performance and make adjustments as necessary. The tool will be useful for FPGA/ASIC design.
- A new software package VHDL FFT Rapid Auto Generation that is capable of autogenerating VHDL for FPGAs and ASICs.
- Implementation of target tracking and location estimation on GPUs. It has been implemented using C and Compute Unified Device Architecture (CUDA).
- Examples of parallel
Dr. Mohsin M. Jamali is Professor of Electrical Engineering and Computer Science at the University of Toledo, Toledo, Ohio. He earned his B.Sc. Engineering degree in Electrical Engineering from the Aligarh Muslim University, India in 1975, M.S. in Electrical Engineering from the University of Saskatchewan, Canada in 1979 and Ph. D. in Electrical Engineering from the University of Windsor, Canada in 1984. He joined the University of Toledo in 1984. His research is in the area of parallel computer architectures for real time applications. He has worked in the area of in-vehicle networks. Recent research interests include parallel processing using FPGAs, Multi Core, GPUs for radar signal processing, adaptive control algorithms, acoustic and IR video Processing. He has published over 115 journals/conference papers. His research has been sponsored by NASA, Office of Naval Research, Air Force and others. He has offered seminars for SAE for in-vehicle networks. He presented a tutorial on intelligent vehicles at the ICASSP, Turkey in 2000. He has served as consultant for NATO Science for Peace program. He received two Awards from University Clean Energy Alliance of Ohio. He is a senior member of IEEE.
The participants during the DLP lecture at CISIR, UTP (below).